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    THẠC SĨ Charge trapping characterization methodology for the evaluation of hafnium-based gate dielectr

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  6. Charge trapping characterization methodology for the evaluation of hafnium-based gate dielectr

    TABLE OFCONTENTS
    LIST OF FIGURES . x
    LIST OFTABLES .xvii
    1 INTRODUCTION . 1
    1.1 Gate Dielectric Scaling 1
    1.2 High-κ Gate Dielectrics . 3
    1.3 Overview of the Dissertation . 4
    1.4 References 5
    2 DIAGNOSTIC METHODS FOR GATE DIELECTRIC EVALUATION . 9
    2.1 Introduction 9
    2.2 Metal-Insulator-Semiconductor Structures 10
    2.2.1 Ideal MIS Structure With Doped Poly-Silicon as the Gate . 11
    2.2.2 Qualitative Description .12
    2.2.3 Accumulation 12
    2.2.4 Flatband .14
    2.2.5 Depletion .14
    2.2.6 Inversion 15
    2.3 Non-Ideal Characteristics of the MIS Structure . 17
    2.3.1 Effect of Insulator Charges of the Flatband Voltage 17
    2.3.2 Flatband Voltage .19
    2.3.3 Effects of Poly-Depletion 20
    2.4 Conditions for p+ Poly-Silicon and n-Type Substrate 21
    2.5 Current-Voltage Characteristics .22
    2.5.1 Gate Current Versus Gate Voltage 22
    2.5.2 Drain Current Versus Drain Voltage . 26
    2.6 Mobility Extraction 28
    2.7 Summary 30
    2.8 References 30
    3 ELECTRICALCHARACTERIZATION CONCERNS FOR SUB-2NM EOT GATE
    DIELECTRICS ON SILICON . 31
    3.1 Introduction 31
    3.2 Capacitance- Voltage Measurement 32
    3.3 MIS Parameter Extraction 40
    3.3.1 C-V Measurement Issues 41
    3.3.2 Parameter Extraction Methodology 42
    3.4 Drain Current- Gate Voltage Measurements . 49
    3.4.1 Id-Vg Leakage Current Correction . 51
    3.4.2 Mobility Extraction .52
    3.5 Summary 54
    3.6 References 55
    vii
    4 TEST STRUCTURE DESIGN 57
    4.1 Introduction 57
    4.2 Starting Material 57
    4.3 Test Structure Design . 58
    4.4 Process Flow 63
    4.4.1 Alternative Gate Dielectric Processing Techniques 65
    4.5 Summary 67
    4.6 References 68
    5 CHARGE TRAPPINGMEASUREMENTS AND THEIRAPPLICATION TO HIGH-κ
    GATE STACK EVALUATION 69
    5.1 Introduction 69
    5.2 Capacitance – Voltage Hysteresis 70
    5.2.1 Application of Capacitance – Voltage Hysteresis Measurements 73
    5.3 Stress and Sense Methodologies 83
    5.3.1 Stress/C-V Measurement 84
    5.3.2 Stress/I-V Measurement 86
    5.3.3 Application of the Stress/C-V Measurement 87
    5.4 Charge Pumping .90
    5.5 Fast Transient Charge Trapping Technique . 95
    5.6 Comparison of Charge Trapping Measurement Techniques . 98
    5.7 Fast Transient Mobility Extraction 102
    5.8 Summary 104
    5.9 References 105
    6 CHARGE TRAPPING AND MOBILITYDEGRADATION IN MOCVD HAFNIUM
    SILICATE GATE DIELECTRIC STACK STRUCTURES 107
    6.1 Introduction 107
    6.2 Process Flow and Experiment 108
    6.3 Experimental Results .108
    6.3.1 SIMS Analysis 108
    6.3.2 DC Measurements .109
    6.3.3 Charge Pumping 112
    6.3.4 Fast Transient 114
    6.3.5 Pulsed Id-Vg Mobility Extraction . 116
    6.4 Summary 119
    6.5 References 120
    7 CHARGE TRAPPINGMODEL FOR MOCVD HAFNIUM-BASED GATE
    DIELECTRIC STACK STRUCTURES AND ITS IMPACT ON DEVICE PERFORMANCE . 121
    7.1 Introduction 121
    7.2 Process Flow and Experiment 122
    7.3 Results and Discussion 123
    7.3.1 Physical Analysis 124
    7.3.2 Electrical Analysis 125
    7.3.3 High-κ Bulk Trapping . 134
    7.3.4 Pulsed Id-Vg Mobility Extraction 141
    viii
    7.4 Summary 143
    7.5 References 143
    8 CONCLUSIONS . 145
    APPENDIX: PRESENTATIONS AND PUBLICATIONS 148

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